The silicon integrated circuit and its continued miniaturization has created an electronics industry that is now facing its limit due to economic and physical constraints. Current integrated circuit devices are being manufactured using sub-micron scale dimensions, while new solutions are enabling the development of nanometer scale devices.
Prior proposed solutions to the problem of constructing nanometer scale devices have involved (1) the utilization of extremely fine scale lithography using X-rays, electrons, ions, scanning probes, or stamping to define the device components; (2) direct writing of the device components by electrons, ions, or scanning probes; or (3) the direct chemical synthesis and linking of components with covalent bonds. The major problem with (1) is that the wafer on which the devices are built must be aligned to within a small fraction of the size of the device features in at least two dimensions for several successive stages of lithography, followed by etching or deposition to build the devices. This level of control does not scale well as device sizes are reduced to nanometer scale dimensions. It becomes extremely expensive to implement as devices are scaled down to nanometer scale dimensions. The major problem with (2) is that it is a serial process, and direct writing a wafer full of complex devices, each containing trillions of components, could well require many years. Finally, the problem with (3) is that high information content molecules are typically macromolecular structures such as proteins of DNA, and both have extremely complex and, to date, unpredictable secondary and tertiary structures that cause them to twist into helices, fold into sheets, and form other complex 3D structures that will have a significant and usually deleterious effect on their desired electrical properties as well as make interfacing them to the outside world impossible.
The problem of building a physical digital circuit as opposed to only a set of digital devices, is to connect a set of devices with a physical interconnect which is topologically equivalent to the logical net list of the logic design that is being implemented. The construction of a computer system requires the design and interconnection of more complex functional elements such as processors, memories and input/output devices. Nanometer scale devices have been developed for providing specific functions including memory as disclosed in U.S. Pat. No. 6,128,214, “Molecular Wire Crossbar Memory”, issued to Philip J. Kuekes et al on Oct. 3, 2000, and for input/output and signal routing as disclosed in U.S. Pat. No. 6,256,767, “Demultiplexer for a Molecular Wire Crossbar Network”, issued to Philip J. Kuekes et al on Jul. 3, 2001, and in U.S. Pat. No. 6,314,019B1, “Molecular-Wire Crossbar Interconnect (MWCI) for Signal Routing and Communications”, issued to Philip J. Kuekes et al on Nov. 6, 2001; all three patents are assigned to the same assignee as the present invention. The contents of these three patents are expressly incorporated herein by reference.
A need exists for the development, fabrication and integration of nanometer scale devices that can implement complex functional elements and be readily manufactured.